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您将学到什么：
- How to build a better silicon testbed.
- Modern software-based testing approaches can automate many aspects of testbed setup.
If we didn’t realize it before, the post-COVID-19 marketplace has been a helpful reminder of just how much our modern world runs on silicon. Fromvehiclesto智能手机toPS5to狗洗，在某些情况下，无数行业看到其供应链被中断grinding business停止。
最终，这些半导体短缺和生产延迟将奏效。亚洲的植物将返回在线，制造能力将增加，供应链将恢复正常。但是对于芯片组制造商，网络供应商或OEM，根据新硅的不同，“正常”仍然有足够的改进空间。
实际上，芯片设计和制造过程长期以来一直困扰着延迟和效率低下，主要嫌疑犯包括缓慢的过时的测试过程。即使供应链完美地运行，硅开发通常也包括设计团队和制造商之间的无穷无尽的来源，每个周期都会增加成本和延迟。在此过程中，虫子出现了，数千个小时被烧毁了，并将交付目标推迟了几个月。
现在，随着我们冲向800克光学，超高密度数据中心以及新颖的5G和Edge解决方案，对新的应用特定应用集成电路（ASIC）和System-Chip（SOC）技术的需求将会只成长。如果我们重新评估半导体行业以防止未来的破坏，我们也应该借此机会重新考虑测试工作流程。通过拥抱更现代的方法，我们可以消除一些最固执的（最昂贵）的硅创新障碍。
传统测试的问题
为明天的ASIC和SOC计划计划的下一代技术可能直接来自科幻小说。然而，我们根据将新的解决方案推向市场的测试工作流程，超过了他们的素数。要测试ASIC或印刷电路板设计，我们必须模拟它在硅中的表现。从历史上看，唯一的方法是通过庞大的，基于硬件的电子设计自动化（EDA）仿真系统进行物理测试。
传统EDA系统一次只能将流量生成20至30个端口，并且需要每个端口和接口的不同测试集。对于现代IC来说，这个过程变得非常乏味且耗时。的确，前硅验证是如此缓慢且昂贵，由于成本和时间压力，许多公司都赶紧努力。有些人甚至完全跳过它，选择通过后硅验证来处理任何问题。当然，这是一个冒险的选择。
当设计后发现一个严重的错误baked into silicon, companies often must go back to the drawing board, adding months of delays and thousands of hours of extra, expensive work to the project. In the worst-case scenario—uncovering a major issue after a product has already been adopted by customers—they can take a huge hit to their balance sheet and reputation cleaning up the mess. According to the National Institute of Standards and Technology (NIST), defects discovered post-release cost 30X more to correct than when identified earlier in the design process.
建造更好的测试床
What can we do to fix this problem? We can start by drawing a line in the sand on what the “right” approach looks like: the goal should be to identify and correct most bugsbefore它们被烤成硅。要到达那里，我们应该以一种更现代，自动化和以软件为中心的方法进行标准化，以验证前验证和后硅后验证。
The good news is that we now have the tools at our disposal to put these ideas into action. Modern EDA systems and emulators are smaller and more efficient than their hardware-based predecessors and are increasingly virtualized and cloud-based. All-software emulators can now use traffic emulation capabilities that already exist in the network. In addition, new virtualized testing systems are able to scale up to test thousands of ports in a fraction of the time of previous approaches.
Just as important, modern software-based testing approaches can automate many aspects of testbed setup—modeling complex network environments in minutes that previously took a week or longer to build manually. These capabilities empower engineers to easily modify the functional building blocks under test and emulate many more protocols and traffic scenarios much more quickly.
与工程团队每天使用相同数量的测试用例进行相同数量的测试案例已经变得普遍。由于无需学习不同的脚本或编写数百万行代码，即使具有最低测试设计专业知识的工程师也可以进行严格，彻底的设计验证和验证。
Looking Ahead
加快创新性ASIC和SOC技术的发展的需求并没有消失。如果有的话，新兴的数据中心，Edge和5G应用程序上的应用将对芯片设计师和制造商施加更大的压力。
We’ve all now seen just how critical an efficient, smoothly running silicon ecosystem is to millions of businesses around the world. Industry and government leaders are already taking action to add manufacturing capacity and prevent future disruptions in the global semiconductor supply chain. These are important and welcome steps. But as an industry, we can do more.
The time has come to move away from silicon testing approaches that can barely keep up with the needs of today, much less the high-pressure market demands of tomorrow. By standardizing on modern, software-centric approaches to pre-silicon verification and post-silicon validation, we can shortcut one of the industry’s most common sources of delays and runaway costs. We can ensure that when tomorrow’s technology visionaries want to bring new solutions to market, the silicon they’re depending on is ready to fuel their most transformative innovations.
